EFM32WG 32-bit ARM® Cortex®-M4 Microcontroller

Our EFM32WG 32-bit microcontrollers (MCUs) have low active and standby power consumption. The 32-bit microcontroller family includes 60 devices based on the ARM® Cortex®-M4 core, providing a full DSP instruction set and hardware FPU for faster computation performance. 

The EFM32WG MCU family includes a flexible range of standby and sleep modes and intelligent peripherals to minimize energy consumption. This diverse set of peripherals and modes allows designers to implement many application functions using ultra-low standby current and without CPU wake-up.

Sleep current with RTC as low as
0.95 μA
Active current as low as
225 μA/MHz

EFM32WG Common Specs

  • ARM Cortex-M4 CPU platform
  • 48 MHz
  • Up to 256 Flash
  • Up to 32 kB RAM
  • 225 μA/MHz in Active Mode (EM0)
  • 0.95 μA sleep with RTC and RAM retention
  • Autonomous peripherals in sleep
  • DMA and peripheral reflex system
  • LESENSE
  • USART, I²C, SPI, and USB
  • Up to 93 General Purpose I/O Pins
  • -40 °C to 125 °C operation range
  • 1.98 V to 3.8 V single power supply
  • Packages:
    • 64-pin QFN (9 mm x 9 mm)
    • 64-pin QFP (10 mm x 10 mm)
    • 100-pin QFP (14 mm x 14 mm)
    • 112-pin BGA (10 mm x 10 mm)
    • 120-pin BGA (7 mm x 7 mm)

Status

Find the Right EFM32WG Device Select Columns
Select Columns
Part Number MHz Flash RAM Dig I/O Pins 5 Volt Tolerant ADC 1 DAC USB Cap Sense LCD Temp Sensor Timers (16-bit) AES-128 AES-256 ECC SHA-1 SHA-2 RSA-2048 UART USART SPI I2C I2S EMIF RTC Comparators Vdd (min) Vdd (max) Package Type Package Size (mm) Internal Osc. Debug Interface Cryptography ADC
48 256 32 56 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 5 3 3 2 1 0 2 1.98 3.8 QFN64 9x9 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 86 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 7 3 3 2 1 0 2 1.98 3.8 QFP100 14x14 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 53 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 5 3 3 2 1 0 2 1.98 3.8 QFN64 9x9 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 83 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 7 3 3 2 1 0 2 1.98 3.8 QFP100 14x14 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 86 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 7 3 3 2 1 0 2 1.98 3.8 QFP100 14x14 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 90 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 7 3 3 2 1 0 2 1.98 3.8 BGA112 10x10 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit
48 256 32 87 12-bit, 8-ch., 1 Msps 12-bit, 2 ch. 4 AES-256 7 3 3 2 1 0 2 1.98 3.8 BGA112 10x10 ±2% ETM; SW AES-128 AES-256 8 x Ch 500 x MSPS 12 x bit

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