SiM3C1xx Common Specs
- 32-bit ARM Cortex-M3 CPU
- 80 MHz maximum system clock
- 32–256 kB Flash and 8–32 kB SRAM
- External bus interface supports up to 16 MB external memory and parallel LCD interface
- Ultra low power modes
- 85 nA sleep mode with brown out detector and 4 kB RAM preserved
- 350 nA sleep mode w/ RTC (internal oscillator)
- 650 nA sleep mode w/ RTC (external oscillator)
- 275 µA/MHz at 80 MHz
- Internal oscillator with PLL: 1–80 MHz ±1.5% accuracy; spread-spectrum mode for reduced EMI
- 2 x 12-bit 250 ksps ADCs (1 MSPS in 10-bit mode)
- 1.2/1.65/2.4 V internal voltage references
- 2 x 10-bit digital-to-analog converters
- Temperature sensor
- 2 low-power comparators with 6-bit programmable voltage reference
- 16 capacitive touch inputs
- 16-channel DMA
- 2 x USART, 2 x UART, 3 x SPI, 2 x I²C, I²S
- 2 x 32-bit or 4 x 16-bit timers with capture/compare
- 2 x 16-bit, 2-ch. counters with capture/compare/PWM
- 16-bit, 6-channel motor control counter
- Up to 6 high drive (5–300mA) I/O
- Up to 65 flexible I/O
- 128/192/256-bit hardware AES encryption
- 16/32-bit CRC
- JTAG, serial-wire, and ETM debugger support
- Temperature range: –40 to +85 °C
- 2.7–5.5 V supply voltage (internal regulator enabled)
- 1.8–3.6 V supply voltage (internal regulator disabled)
- LGA and QFN package options (40/64/92-pin)
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| Part Number | MHz | Flash | RAM | Dig I/O Pins | 5 Volt Tolerant | ADC 1 | DAC | USB | Cap Sense | LCD | Temp Sensor | Timers (16-bit) | UART | USART | SPI | I2C | I2S | EMIF | RTC | Comparators | Vdd (min) | Vdd (max) | Package Type | Package Size (mm) | Internal Osc. | Debug Interface |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 80 | 32 | 8 | 28 | 12-bit, 7-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN40 | 6x6 | ±1.5% | JTAG; SW | |||||||
| 80 | 32 | 8 | 50 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN64 | 9x9 | ±1.5% | ETM; JTAG; SW | |||||||
| 80 | 64 | 16 | 28 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN40 | 6x6 | ±1.5% | JTAG; SW | |||||||
| 80 | 64 | 16 | 50 | 12-bit, 7-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN64 | 9x9 | ±1.5% | ETM; JTAG; SW | |||||||
| 80 | 128 | 32 | 28 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN40 | 6x6 | ±1.5% | JTAG; SW | |||||||
| 80 | 128 | 32 | 50 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN64 | 9x9 | ±1.5% | ETM; JTAG; SW | |||||||
| 80 | 128 | 32 | 65 | 12-bit, 7-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | LGA92 | 7x7 | ±1.5% | ETM; JTAG; SW | |||||||
| 80 | 256 | 32 | 28 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN40 | 6x6 | ±1.5% | JTAG; SW | |||||||
| 80 | 256 | 32 | 50 | 12-bit, 13-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | QFN64 | 9x9 | ±1.5% | ETM; JTAG; SW | |||||||
| 80 | 256 | 32 | 65 | 12-bit, 16-ch., 250 ksps | 10-bit, 2-ch. | 5 | 4 | 0 | 3 | 2 | 1 | 1 | 2 | 1.8 | 5.5 | LGA92 | 7x7 | ±1.5% | ETM; JTAG; SW |
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