EFR32BG24L Series 2 Bluetooth® Wireless SoC

Coming Soon

The BG24L, optimized for Channel Sounding and Bluetooth LE applications, features a built-in AI/ML hardware accelerator that offers up to 8x faster inferencing over Cortex-M, and consumes up to 6x lower power making it ideal for cost-effective intelligent edge nodes with a long battery life. The device prioritizes security with Secure Vault Mid, safeguarding against remote attacks. The pin-compatibility of this SoC with other device families in the Silicon Labs Bluetooth portfolio allows customers to seamlessly migrate to SoCs with expanded memory, higher clock speeds, and additional security. BG24L is an ideal fit for channel sounding-related applications like Asset Tracking and Direction Finding as well as AI/ML-related applications such as Predictive Maintenance.

Efr32bg24l block diagram
Supports Bluetooth 6.0, Bluetooth mesh & Proprietary
Ideal for low-power battery-powered IoT devices

EFR32BG24L Common Specs

Low Power Wireless System-on-Chip

  • High-performance 32-bit 78.0 MHz ARM Cortex®-M33 with DSP instruction and floating-point unit for efficient signal processing
  • Up to 768 kB flash program memory
  • Up to 96 kB RAM data memory
  • 2.4 GHz radio operation

Radio Performance

  • -97.6 dBm RX sensitivity @ 1 Mbit/s GFSK
  • TX power up to +10 dBm

Low System Energy Consumption

  • 33.4 μA/MHz in Active Mode (EM0) at 39.0 MHz
  • 1.3 μA EM2 DeepSleep current (16 kB RAM retention and RTC running from LFRCO))
  • 4.4 mA RX current (1 Mbps GFSK)
  • 5 mA TX current @ 0 dBm outputpower
  • 19.1 mA TX current @ 10 dBm output power

Wide Selection of MCU Peripherals

  • Analog to Digital Converter (IADC)
    • 12-bit @ Msps or 16-bit @ 76.9 ksps
    • Select OPNs support High Speed Mode (up to 2 Msps) and High Accuracy Mode (up to 16-bits ENOB at 3.8 ksps)
  • 2x Analog Comparator (ACMP)
  • 2x Digital Analog Converter (VDAC)
  • Up to 26 General Purpose I/O pins with output state retention and asynchronous interrupts
  • 8 Channel DMA Controller (LDMA)
  • 16 Channel Peripheral Reflex System (PRS)
  • 3 × 16-bit Timer/Counter with 3 Compare/Capture/PWM channels (TIMER2/3/4)
  • 2 × 32-bit Timer/Counter with 3 Compare/Capture/PWM channels (TIMER0/1)
  • 2x 32-bit 32-bit Real Time Counter (SYSRTC/BURTC)
  • 24-bit Low Energy Timer for waveform generation (LETIMER)
  • 16-bit Pulse Counter with asynchronous operation (PCNT)
  • 2 × Watchdog Timer (WDOG)
  • 1 × Universal Synchronous/Asynchronous Receiver/Transmitter (USART), supporting UART/SPI/SmartCard (ISO 7816)/IrDA/I2S
  • 1 × Enhanced Universal Synchronous/Asynchronous Receiver/Transmitter (EUSART) supporting UART/SPI/DALI/IrDA
  • 1 × I2C interface with SMBus support
  • Precision Low-Frequency RC Oscillator with precision mode to replace 32 kHz sleep crystal (LFRCO)
  • Keypad scanner supporting up to 6x8 matrix (KEYSCAN)
  • Die temperature sensor with +/- 1.5 °C accuracy after single-point calibration

Supported Modulation Format

  • 2 (G)FSK with fully configurable shaping
  • (G)MSK

Protocol Support

Wide Operation Range

  • 1.71 V to 3.8 V single power supply
  • -40 °C to 125 °C

Packages

  • QFN40 5 mm × 5 mm × 0.85 mm

 

Security Features

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