Device/Module image

EFR32FG12P232F1024GL125

Sub-GHz and 2.4 GHz

EFR32FG12P232F1024GL125 EFR32FG12 Series 1 wireless SoCs are targeted at proprietary wireless applications for secure, connected, wireless devices. The device includes an ARM Cortex-M4 based microcontroller (MCU) and provides a maximum output power of 19 dBm. With a receive sensitivity of -102.7 (250 kbps DSSS-OQPSK 2.4 GHz) dBm (2.4 kbps, 2 GFSK 0.1% BER), the EFR32FG12P232F1024GL125 supports a full DSP instruction set and floating-point unit to speed computation. Built with low-power Gecko technology which includes innovative low-energy techniques, fast wake-up times and energy saving modes the EFR32FG12P232F1024GL125 is ideal for energy-sensitive applications. In addition, this device includes 1024 kB Flash, 128 kB RAM, 65 GPIO Pins, 9 x 16-bit timers and multiple communication interfaces.

EFR32FG12P232F1024GL125
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RAM (kB)

Key Specs

128 RAM (kB)
Flash
1024
RAM
128
Communications
2
Output Power Min (dBm)
-30
Output Power Max (dBm)
19
Proprietary 2.4 GHz
Yes
Proprietary Sub-GHz
No
Multiprotocol
No
Cryptography
Yes
Dig I/O Pins
65
ADC-1
12-bit, SAR, 1 Msps
Timers (16-bit)
9
Temperature Min ºC
-40
Temperature Max ºC
85
Package Type
BGA125
Package Size (mm)
7x7
Flash
1024
RAM
128
Communications
2
Output Power Min (dBm)
-30
Output Power Max (dBm)
19
Proprietary 2.4 GHz
Yes
Proprietary Sub-GHz
No
Multiprotocol
No
Cryptography
Yes
Dig I/O Pins
65
ADC-1
12-bit, SAR, 1 Msps
Timers (16-bit)
9
Temperature Min ºC
-40
Temperature Max ºC
85
Package Type
BGA125
Package Size (mm)
7x7
EFR32FG Block Diagram
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